Sample and Hold

Sample And Hold

Abstract

Mostly the amplifiers that we use in analog are “continuous time” where the input signal is continuously available and applied to the circuit and the output signal is continuously observed. Video, audio and high speed analog systems are mostly based upon this. In many situations however, the input may be sensed only periodically while ignoring its value at other instants. A circuit hence called “discrete time” or “sampled data” system thus samples the input and produces a valid output at the end of each period (comprising a sample and hold phase). Sample and hold amplifiers therefore act as analog storage devices.

An ideal S/H amplifier would be able to track any kind of input signal and upon being given a hold command store at its output, without delay, the precise value of the signal and maintain this value indefinitely. Unfortunately ideal S/H amplifiers don’t exist as yet, and correspondingly our designed assignment aims at the attainment of a near perfect S/H amplifier with an optimum tradeoff between the various designed parameters.

Loosely sample hold amplifier may be realized with a switch in series with a capacitor. Although the switch can control the mode of the device, and the capacitor can store a voltage, a S/H using just these components would have very poor performance.

By studying the deficiencies of such a configuration, we can better appreciate the components that are added to this basic core to comprise a practical S/H amplifier.

First, when in sample mode the charging time of the hold capacitor for the S/H is dependent on the source impedance of the input. A large source impedance would give a large RC time constant, leading to a high acquisition time. To ameliorate this effect, one buffers the hold capacitor from the input with an operational amplifier (assuming that the op amp is capable of driving a capacitive load). The acquisition time will then be independent of the source impedance, and will in fact be low due to the low output impedance of an operational amplifier.

Second, when in hold mode the hold capacitor will discharge through the load. Hence, the droop rate (directly propotional to leakage current ) will be load dependent and could be very high. To ameliorate this problem, one buffers the hold capacitor from the output with an op amp. the droop rate will then be independent of the load, and will actually be rather low, due to the large input impedance of an op amp.

Hence, in addition to a switch and a hold capacitor, a practical S/H amplifier must include input and output buffers. The two main variations of this structure, the open-loop